In a multi-processor computer system, a processor may access various memory devices in a number of ways ranging from local memory access via a common bus to foreign memory access via other devices, including other processors. For example, in a symmetric multi-processing (SMP) architecture, processors may directly access all memory devices. Interleaving memory pages across nodes approximates some of the uniform memory access latency characteristics of a traditional SMP system. However, as the number of processors in a computer system increases, providing an adequate bandwidth for symmetric interconnections between processors and memory devices becomes more and more difficult.
In a non-uniform memory access (NUMA) system, requirements to the bandwidth between processors and memory devices are typically alleviated by connecting each processor directly to some memory devices, while providing the processor with indirect connections (e.g., via other processors) to some other memory devices. Regions of memory connected indirectly in a NUMA system may take longer to access than directly connected regions.